This invention relates to electronic reset circuits in general and more particularly to power-on clear reset circuits for use with microprocessor-controlled apparatus.
The need for a power-on clear circuit in a microprocessor or other logic dependent circuits has been met in a variety of ways to enable the user to know the "state" of each of the logic circuits in the apparatus upon power-up. This capability is necessary to prepare the microprocessor or logic circuit to receive the first set of data/instructions and begin to perform its function.
With typical prior art reset circuits, the reset pulse is triggered by a power-on situation and thereafter the microprocessor will transmit a "heartbeat" activity monitor pulse which disables the reset circuitry during periods of reception of the pulse. Upon failure during a predetermined time period to receive the activity monitor signal, a typical power-on clear circuit with activity monitor capability will transmit a reset pulse to the microprocessor thereby enabling functions to begin again.
A somewhat improved power-on restart circuit such as that described in Samuel A. Leslie U.S. Pat. No. 4,367,422 additionally has the capability of issuing a reinitializing reset signal in response to low voltage power supply transients, essentially similar in function to the circuit described in James S. Thomas U.S. Pat. No. 4,296,338. However, a single reset or initialization pulse under a slowly building voltage condition or a constant low voltage situation will not restart the microprocessor and will tend to cause a lock-up condition for the apparatus. Additional useful background material is contained in the following U.S. Pat. Nos.: Yoichi Imamura 4,103,187; Shinichi Tanaka 4,140,930; Fuad H. Musa et.al. 4,224,539; and Joseph P. Winebarger 4,260,907. Each of the above-identified U.S. patent documents are hereby incorporated by reference thereto.
A significant problem has been noted in the art in that the power supply, in some applications, may tend to build voltage at a relatively slow rate and trigger the reset circuit prior to having sufficient voltage applied to the microprocessor to provide proper operation. In this condition, the reset pulse has no effect on the microprocessor and the reset circuitry as well as microprocessor become effectively frozen until power is removed and again applied to reset the circuitry.
A similar situation occurs during a "brown-out" type situation when the supplied power drops below that required for the microprocessor, disabling the microprocessor function, and a reset pulse is immediately transmitted. In such cases the reset pulse will have no effect and once again the system becomes locked until power is removed and reapplied. This is typically accomplished by turning the circuit breaker or the power switch to the microprocessor off, and then on again.